Achieving high productivity with hardware development toolchains is difficult. When issues arise, understanding the available feedback (simulation and synthesis error messages, waveforms, output files) to determine the root cause is challenging. This motivates using machine learning (ML) to assist in this area. We propose utilizing Large Language Models (LLMs), which have demonstrated significant capabilities for comprehending and producing complex structured and unstructured text. Our goal is to train/fine-tune LLMs over the developer workflow itself, starting from open-source tools (e.g. iverilog, Yosys) and their usage scripts. These would be combined with relevant design context such as files and simulation data, including logs and waveforms. Some data may be project-specific, while others may be more regularly structured (such as error messages).

We will work to the following goal: after an issue is encountered, the LLMs will be able to provide rectifying guidance, thus accelerating developer productivity. As solely advisory models, these LLMs would not introduce the same level of risk as those used for code writing. To ensure that there would be no costly infrastructure requirements, we would focus on smaller and locally-deployable models.


Computer Science and Engineering

Research Area

Artificial intelligence | Hardware design | Large language models | Natural language processing | EDA

This research will be undertaken at UNSW School of Computer Science and Engineering within the hardware and AI research groups and in conjunction with staff at Intel serving in an advisory role. Access to state of the art AI models are available, as are GPU resources for training models should this be necessary. All necessary resources, such as GPU compute and hardware development tools, are available.

The expected research outcomes may include:

  1. new frameworks for utilizing existing AI models to work with hardware tooling to parse feedback and provide advice
  2. new methods or training data for training and evaluating AI for hardware design
  3. publications and intellectual property.


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