Hui Guo

Senior Lecturer

 I received the BE and ME degrees in Electrical and Electronic Engineering from Anhui University in China and PhD in Electrical and Computer Engineering from the University of Queensland in Australia. Prior to joining the University of New South Wales, I worked in several companies in Canada for large information and e-commerce systems. My current research interests include design approaches and customization techniques for embedded systems.

Conference Papers
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Yang S; Wu P; Guo H, 2021, 'DualNet: Locate Then Detect Effective Payload with Deep Attention Network', in 2021 IEEE Conference on Dependable and Secure Computing, DSC 2021, http://dx.doi.org/10.1109/DSC49826.2021.9346261
2021
Wu P; Guo H; Moustafa N, 2020, 'Pelican: A Deep Residual Network for Network Intrusion Detection', in Proceedings - 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN-W 2020, IEEE, pp. 55 - 62, presented at 2020 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W), 29 June 2020 - 02 July 2020, http://dx.doi.org/10.1109/DSN-W50199.2020.00018
2020
Wu P; Moustafa N; Yang S; Guo H, 2020, 'Densely Connected Residual Network for Attack Recognition', Guangzhou, China, presented at The 19th IEEE International Conference on Trust, Security and Privacy in Computing and Communications, Guangzhou, China, 31 December 2020
2020
Hussain M; Guo H, 2019, 'A Bandwidth-Aware Authentication Scheme for Packet-Integrity Attack Detection on Trojan Infected NoC', in IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC, pp. 201 - 206, http://dx.doi.org/10.1109/VLSI-SoC.2018.8645051
2019
Hussain S; Guo H, 2019, 'A low performance-overhead ORAM design for processor system with un-trusted off-chip memory', in Proceedings of 2019 IEEE 2nd International Conference on Automation, Electronics and Electrical Engineering, AUTEEE 2019, pp. 315 - 321, http://dx.doi.org/10.1109/AUTEEE48671.2019.9033153
2019
Wu P; Guo H, 2019, 'LuNet: A Deep Neural Network for Network Intrusion Detection', in 2019 IEEE Symposium Series on Computational Intelligence, SSCI 2019, pp. 617 - 624, http://dx.doi.org/10.1109/SSCI44817.2019.9003126
2019
Wu P; Guo H; Buckland R, 2019, 'A Transfer Learning Approach for Network Intrusion Detection', in 2019 4th IEEE International Conference on Big Data Analytics, ICBDA 2019, pp. 281 - 285, http://dx.doi.org/10.1109/ICBDA.2019.8713213
2019
Hussain M; Malekpour A; Guo H; Parameswaran S, 2018, 'EETD: An energy efficient design for runtime hardware trojan detection in untrusted network-on-chip', in Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, pp. 345 - 350, http://dx.doi.org/10.1109/ISVLSI.2018.00070
2018
Hussain M; Guo H, 2017, 'Packet leak detection on hardware-trojan infected NoCs for MPSoC systems', in ACM International Conference Proceeding Series, Wuhan, China, pp. 85 - 90, presented at 2017 International Conference on Cryptography, Security and Privacy, Wuhan, China, 17 March 2017 - 19 March 2017, http://dx.doi.org/10.1145/3058060.3058061
2017
Chen H; Zhu X; Qiu D; Guo H; Yang LT; Lu P, 2016, 'EONS: Minimizing Energy Consumption for Executing Real-Time Workflows in Virtualized Cloud Data Centers', in Proceedings of the International Conference on Parallel Processing Workshops, pp. 385 - 392, http://dx.doi.org/10.1109/ICPPW.2016.60
2016
Wickramasinghe M; Guo H, 2016, 'Data-space relocation to improve data cache performance for embedded multi-threaded processor systems', in ACM International Conference Proceeding Series, pp. 193 - 197, http://dx.doi.org/10.1145/3033288.3033335
2016
Liu T; Guo H; Parameswaran S; Hu XS, 2016, 'Improving tag generation for memory data authentication in embedded processor systems', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 50 - 55, http://dx.doi.org/10.1109/ASPDAC.2016.7427988
2016
Wickramasinghe WM; Guo H, 2015, 'Effective Hardware-Level Thread Synchronization for High Performance and Power Efficiency in Application Specific Multithreaded Embedded Processors', in Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015, New York City, USA, pp. 311 - 318, presented at The 33rd IEEE International Conference on Computer Design 2015, New York City, USA, 18 October 2015 - 21 October 2015, http://dx.doi.org/10.1109/ICCD.2015.7357119
2015
Liu T; Guo H, 2014, 'Dynamic encryption key design and its security evaluation for memory data protection in embedded systems', in 2014 International Conference on IT Convergence and Security, ICITCS 2014, http://dx.doi.org/10.1109/ICITCS.2014.7021759
2014
Wickramasinghe M; Guo H, 2014, 'Energy-Aware Thread Scheduling for Embedded Multi-Threaded Processors: Architectural Level Design and Implementation', in Ghosal P (ed.), Proceedings IEEE Computer Society Annual Symposium on VLSI 2014, IEEE Computer Society Conference Publishing Services (CPS), Tampa, Florida, USA, pp. 178 - 183, presented at IEEE Computer Society Annual Symposium on VLSI 2014, Tampa, Florida, USA, 09 July 2014 - 11 July 2014, http://dx.doi.org/10.1109/ISVLSI.2014.55
2014
Liu T; Guo H, 2014, 'Dynamic Encryption Key Design and Its Security Evaluation for Memory Data Protection in Embedded Systems', in Kim KJ (ed.), 2014 International Conference on IT Convergence and Security, ICITCS 2014, Beijing, presented at IT Convergence and Security (ICITCS), 2014 International Conference on, Beijing, 28 October 2014 - 30 October 2014, http://dx.doi.org/10.1109/ICITCS.2014.7021759
2014
Guo H; Zhang R, 2013, 'Evaluation of Multi-Threaded Processor Designs for Energy Efficient Embedded Systems', in 2013 IEEE 16th International Conference on Computational Science and Engineering (CSE 2013), IEEE Computer Society, Sydney, Australia, pp. 619 - 626, presented at 2013 IEEE 16th International Conference on Computational Science and Engineering, Sydney, Australia, 03 December 2013 - 05 December 2013, http://dx.doi.org/10.1109/CSE.2013.97
2013
Hong M; Guo HA; Hu XS, 2012, 'A Cost-Effective Tag Design for Memory Data Authentication in Embedded Systems', in Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems, ACM, New York, NY, USA ©2012, pp. 17 - 26, presented at International Conference on Compilers Architecture and Synthesis for Embedded Systems, Tampere, Finland, 07 October 2012 - 12 October 2012, http://dx.doi.org/10.1145/2380403.2380414
2012
Gu J; Guo HA, 2010, 'An Energy Efficient Instruction Prefetching Scheme for Embedded Processors', in Proceedings of International Conference Ubiquitous Computing and Multimedia Applications, Springer, Germany, pp. 73 - 88, presented at The 2010 International Conference Ubiquitous Computing and Multimedia Applications, Miyazaki, Japan, 23 June 2010, http://dx.doi.org/10.1007/978-3-642-13467-8_8
2010
Gu J; Guo HA, 2010, 'Enabling large decoded instruction loop caching for energy-aware embedded processors', in Proceedings of International Conference on Compilers Architectures and Synthesis for Embedded Systems (CASES), ACM, New York, USA, pp. 247 - 256, presented at International Conference on Compilers Architectures and Synthesis for Embedded Systems (CASES), Taipei, Taiwan, 09 October 2010 - 14 October 2010, http://dx.doi.org/10.1145/1878921.1878957
2010
Zhou Y; Guo HA, 2009, 'Register File Customization for Low Power Embedded Processors', in Proceeding of the 2nd IEEE International Conference on Computer Science and Information Technology (IEEE ICCSIT 2009), IEEE Computer Society, Beijing , China, pp. 92 - 96, presented at 2nd IEEE International Conference on Computer Science and Information Technology (IEEE ICCSIT 2009), Beijing , China, 08 August 2009 - 11 August 2009, http://dx.doi.org/10.1109/ICCSIT.2009.5234988
2009
Ignjatovic A; Lee CT; Kutay CM; Guo HA; Compton PJ, 2009, 'Computing marks for multiple assessors using adaptive averaging', in Proceedings of ICEE & ICEER 2009 Korea, Publishing Committee. ICEE & ICEER 2009, Korea, presented at International Conference on Engineering Education & Research, Seoul, Korea, 23 August 2009 - 28 August 2009
2009
Gu J; Guo HA; Li P, 2009, 'ROBTIC: An On-Chip Instruction Cache Design for Low Power Embedded Systems', in Proceedings of the 15th IEEE International Conference on embedded and Real-time Computing Systems and Application, IEEE Computer Society, Beijing, China, pp. 419 - 424, presented at 15th IEEE International Conference on Embedded and Real-time Computing Systems and Application, Beijing, China, 24 August 2009 - 26 August 2009, http://dx.doi.org/10.1109/RTCSA.2009.51
2009
Gu J; Guo H, 2009, 'A Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Power Efficiency', in Proceeding of the 2009 IEEE International Symposium on Circuits and Systems (ISCAS 2009), IEEE CAS Society, Taipei, Taiwan, pp. 137 - 140, presented at IEEE International Symposium on Circuits and Systems 2009, Taipei, TAIWAN, 24 May 2009 - 27 May 2009, http://dx.doi.org/10.1109/ISCAS.2009.5117704
2009
Zhang D; Guo HA; Luo B, 2008, 'An algorithm for estimating number of components of Gaussian mixture model based on penalized distance', in 2008 International conference on neural networks and signal processing, Zhenjiang, China, pp. 482 - 487, presented at International conference on neural networks and signal processing 2008, Zhenjiang, China, 07 June 2008 - 11 June 2008, http://dx.doi.org/10.1109/ICNNSP.2008.4590397
2008
Guo HA; Zhou Y, 2008, 'Application Specific Low Power ALU Design', in 2008 IEEE/IFIP international conference on embedded and ubiquitous computing, Proceedings, Shanghai, China, pp. 214 - 220, presented at 2008 IEEE/IFIP international conference on embedded and ubiquitous computing, Shanghai, China, 17 December 2008 - 20 December 2008, http://dx.doi.org/10.1109/EUC.2008.81
2008
Guo HA; Hong M, 2008, 'Security Design for Networked Multi-Service Smart Card Systems', in Proc. of the 2nd Intl. Conf. on Future Generation Communication and Networking (FGCN 2008), Sanya, China, pp. 299 - 304, presented at 2nd International Conference on Future Generation Communication and Networking (FGCN 2008), Sanya, China, 13 December 2008, http://dx.doi.org/10.1109/FGCN.2008.25
2008
Luo B; Gu W; Guo H, 2008, 'A VQ DIGITAL WATERMARK ALGORITHM BASED ON T-MIXTURE MODELS SEGMENTATION', in 2008 INTERNATIONAL CONFERENCE ON NEURAL NETWORKS AND SIGNAL PROCESSING, VOLS 1 AND 2, IEEE, Zhenjiang, PEOPLES R CHINA, pp. 353 - +, presented at International Conference on Neural Networks and Signal Processing, Zhenjiang, PEOPLES R CHINA, 07 June 2008 - 11 June 2008, http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000265022400075&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=891bb5ab6ba270e68a29b250adbe88d1
2008
Hong M; Guo HA; Luo B, 2008, 'Security Design for Multi-Service Smart Card Systems', in FGCN: PROCEEDINGS OF THE 2008 SECOND INTERNATIONAL CONFERENCE ON FUTUREGENERATION COMMUNICATION AND NETWORKING, VOLS 1 AND 2, Ieee Computer Soc, Los Alamitos
2008
Radhakrishnan S; Guo H; Parameswaran S; Ignjatovic A, 2006, 'Application specific forwarding network and instruction encoding for multi-pipe ASIPs', in CODES+ISSS 2006: Proceedings of the 4th International Conference on Hardware Software Codesign and System Synthesis, pp. 241 - 246, http://dx.doi.org/10.1145/1176254.1176313
2006
Radhakrishnan S; Guo HA; Parameswaran S, 2006, 'Customization of application specific heterogeneous multi-pipeline processors', in 43rd Design automation conference, Munich, Germany, presented at 43rd Design automation conference, Munich, Germany, 06 March 2006 - 10 March 2006
2006
Radhakrishnan S; Hui Guo ; Parameswaran S, 2006, 'Customization of application specific heterogeneous multi-pipeline processors', in Proceedings of the Design Automation & Test in Europe Conference, IEEE, presented at 2006 Design, Automation and Test in Europe, 06 March 2006 - 10 March 2006, http://dx.doi.org/10.1109/date.2006.244094
2006
Guo HA; Parameswaran S, 2005, 'Balancing system level pipelines with stage voltage scaling', in IEEE annual symposium on VLSI, Tampa, Florida, USA, pp. 287 - 289, presented at IEEE annual symposium on VLSI, Tampa, Florida, USA, 11 May 2005 - 12 May 2005
2005
Parameswaran S; Guo HA; Radhakrishnan S, 2004, 'Dual-Pipeline Heterogeneous ASIP Design', in CODES + ISSS 2004, Stockholm, Sweden, pp. 12 - 17, presented at CODES + ISSS 2004, Stockholm, Sweden, 08 September 2004 - 10 September 2004
2004
Parameswaran S; Guo H, 1997, 'Power reduction in pipelines', in Proceedings of the Australian Microelectronics Conference, pp. 239 - 244
1997
Parameswaran S; Guo H, 1997, 'Partitioning of system level pipelines', in Proceedings of the Australian Microelectronics Conference, pp. 233 - 238
1997
Guo H; Parameswaran S, 1997, 'Unfolding loops with interdetermine count in system level pipelines', in Proceedings of the Australian Microelectronics Conference, pp. 82 - 87
1997
Parameswaran S; Guo H, 1997, 'Power consumption in CMOS combinational logic blocks at high frequencies', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 195 - 200
1997
Journal articles
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Yan H; Zhu X; Chen H; Guo H; Zhou W; Bao W, 2019, 'DEFT: Dynamic Fault-Tolerant Elastic scheduling for tasks with uncertain runtime in cloud', Information Sciences, vol. 477, pp. 30 - 46, http://dx.doi.org/10.1016/j.ins.2018.10.020
2019
Wickramasinghe M; Guo H, 2018, 'A Low-Energy Multi-Threaded Processor Design for Application Specific Embedded Systems', International Journal of Computer & Software Engineering, vol. 3, http://dx.doi.org/10.15344/2456-4451/2018/131
2018
Liu G; Zhu X; Wang J; Guo D; Bao W; Guo H, 2018, 'SP-Partitioner: A novel partition method to handle intermediate data skew in spark streaming', Future Generation Computer Systems, vol. 86, pp. 1054 - 1063, http://dx.doi.org/10.1016/j.future.2017.07.014
2018
Liu T; Guo H; Parameswaran S; Hu SX, 2017, 'iCETD: An improved tag generation design for memory data authentication in embedded processor systems', Integration, the VLSI Journal, vol. 56, pp. 96 - 104, http://dx.doi.org/10.1016/j.vlsi.2016.10.006
2017
Zhu X; Wang J; Guo H; Zhu D; Yang LT; Liu L, 2016, 'Fault-Tolerant Scheduling for Real-Time Scientific Workflows with Elastic Resource Provisioning in Virtualized Clouds', IEEE Transactions on Parallel and Distributed Systems, vol. 27, pp. 3501 - 3517, http://dx.doi.org/10.1109/TPDS.2016.2543731
2016
Chen H; Zhu X; Guo H; Zhu J; Qin X; Wu J, 2015, 'Towards energy-efficient scheduling for real-time tasks under uncertain cloud computing environment', Journal of Systems and Software, vol. 99, pp. 20 - 35, http://dx.doi.org/10.1016/j.jss.2014.08.065
2015
Guo H; Zhang R; Garg S, 2013, 'Register File Customization for Embedded Multi-Threaded Pipelined Processors', International Journal of Computer Theory and Engineering, vol. 5, pp. 551 - 556, http://dx.doi.org/10.7763/IJCTE.2013.V5.748
2013
He C; Zhu X; Guo HA; Qiu D; Jiang J, 2012, 'Rolling-horizon scheduling for energy constrained distributed real-time embedded systems', Journal of Systems and Software, vol. 85, pp. 780 - 794, http://dx.doi.org/10.1016/j.jss.2011.10.008
2012
Gu J; Guo HA; Li P, 2011, 'An on-chip instruction cache design with one-bit tag for low-power embedded systems', Microprocessors and Microsystems, vol. 35, pp. 382 - 391, http://dx.doi.org/10.1016/j.micpro.2011.02.003
2011
Gu J; Guo H, 2009, 'An efficient segmental bus-invert coding method for instruction memory data bus switching reduction', Eurasip Journal on Embedded Systems, vol. Volume 2009, pp. 1 - 10, http://dx.doi.org/10.1155/2009/973976
2009
Zhang DM; Fu MS; Guo H; Luo B, 2009, 'Automatic estimation algorithm of component number of mixture model based on penalized distance', Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science), vol. 37, pp. 101 - 107
2009
Hong M; Guo HA, 2009, 'Design of Multi-Service Smart Card Systems for High Security and Performance', International Journal of Security and Its Applications, vol. 3, pp. 87 - 100
2009
Radhakrishnan S; Guo HA; Parameswaran S; Ignjatovic A, 2009, 'HMP-ASIP`s: heterogeneous multi-pipeline application-specific instruction-set processors', IET Computers and Digital Techniques, vol. 3, pp. 94 - 108, http://dx.doi.org/10.1049/iet-cdt:20080005
2009
Parameswaran S; Guo H, 1998, 'Power reduction in pipelines', Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 545 - 550
1998
Guo H; Paramewaran S, 1998, 'Unrolling loops with indeterminate loop counts in system level pipelines', Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 99 - 104
1998
Book Chapters
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Gu J; Guo H, 2013, 'Reducing power and energy overhead in instruction prefetching for embedded processor systems', in Mobile and Handheld Computing Solutions for Organizations and End-Users, pp. 323 - 340, http://dx.doi.org/10.4018/978-1-4666-2785-7.ch018
2013
Books
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Guo HA; Parameswaran S; Radhakrishnan S, 2008, Heterogeneous multi-pipeline ASIP, Original, VDM Verlag, Germany
2008

Computer Architecture

Microprocessors and Interfacing