Scientia Professor Jingling Xue
Professor

Scientia Professor Jingling Xue

  • PhD, Edinburgh University, 1992
  • MSc, Tsingua University, 1987
  • BSc, Tsingua University, 1984
Engineering
Computer Science and Engineering

Professor Jingling Xue is from the School of Computer Science and Engineering. His research interests include:

  • Programming Languages
  • Compiler Technology
  • Program Analysis
  • Software Security Analysis
  • High-Performance Computing (with emphasis on compiler technology and program analysis)
Phone
+61 2 9385 4889
  • Journal articles | 2017
    Su X; Wu H; Xue J, 2017, 'An Efficient WCET-Aware Instruction Scheduling and Register Allocation Approach for Clustered VLIW Processors', ACM Trans. Embed. Comput. Syst., vol. 16, pp. 120:1 - 120:21, http://dx.doi.org/10.1145/3126524
    Journal articles | 2012
    Di P; Wu H; Xue J; Wang F; Yang C, 2012, 'Parallelizing SOR for GPGPUs Using Alternate Loop Tiling', Parallel Computing, vol. 38, pp. 310 - 328, http://dx.doi.org/10.1016/j.parco.2012.03.004
    Journal articles | 2009
    Swain MV; Xue J, 2009, 'State of the art of Micro-CT applications in dental research.', International journal of oral science, vol. 1, pp. 177 - 188, http://dx.doi.org/10.4248/IJOS09031
  • Conference Papers | 2022
    Wang Q; Zheng L; Hu A; Huang Y; Yao P; Gui C; Liao X; Jin H; Xue J, 2022, 'A Data-Centric Accelerator for High-Performance Hypergraph Processing', in Proceedings of the Annual International Symposium on Microarchitecture, MICRO, IEEE, pp. 1326 - 1341, presented at 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 01 October 2022 - 05 October 2022, http://dx.doi.org/10.1109/MICRO56248.2022.00088
    Conference Papers | 2019
    Su X; Wu H; Xue J, 2019, 'WCET-aware hyper-block construction for clustered VLIW processors', in Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), ACM Press, pp. 110 - 122, presented at the 20th ACM SIGPLAN/SIGBED International Conference, 23 June 2019 - 23 June 2019, http://dx.doi.org/10.1145/3316482.3326349
    Conference Papers | 2017
    Tan T; Li Y; Xue J, 2017, 'Efficient and precise points-to analysis: modeling the heap by merging equivalent automata', in ACM SIGPLAN Notices, pp. 278 - 291, http://dx.doi.org/10.1145/3062341.3062360
    Conference Papers | 2016
    Sui Y; Lu J; Xue J, 2016, 'On-demand Strong Update Analysis via value-flow Refinement', in International symposium on the foundations of software engineering, IEEE, Seattle, pp. 460 - 473, presented at FSE'16, Seattle, 13 November 2016 - 18 November 2016, http://dx.doi.org/10.1145/2950290.2950296
    Conference Papers | 2012
    Wan Q; Wu H; Xue J, 2012, 'WCET-Aware Data Selection and Allocation for Scratchpad Memory', in Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems, ASSOC COMPUTING MACHINERY, Beijing, pp. 41 - 50, presented at LCTES'12, Beijing, 12 June 2012 - 13 June 2012, http://dx.doi.org/10.1145/2345141.2248425

  1. J. Xue. Event Interleaving Analysis for Detecting Event-Driven Order Violations in Android Apps. Australian Research Council (Discovery), 2021 -- 2023, A$315,000.

     

  2. J. Xue. Building Secure Defenses Against Code Reuse Attacks with Modular Pointer Analysis. Australian Research Council (Discovery), 2018 -- 2020, A$362,616.

     

  3. J. Xue. Soundness-Guided Security Analysis for Android Applications. Australian Research Council (Discovery), 2017 -- 2019, A$357,500.

     

  4. J. Xue. Sparse Demand-Driven Analysis to Improve Software Reliability and Security. Australian Research Council (Discovery), 2015 -- 2017, A$266,300.

     

  5. J. Xue and B. Scholz, Finding Concurrency Bugs in Multithreaded Software. Australian Research Council (Discovery), 2013 -- 2015, A$360,000.

     

  6. J. Xue. Automating data placement and movement for explicitly managed memory hierarchies, Australian Research Council (Discovery), 2011 -- 2013, A$390,000.

     

  7. J. Xue and J. Potter. A Programming Model of Object Validity for Secure and Efficient Concurrency Australian Research Council (Discovery), 2009 -- 2011, A$391,000.

     

  8. J. Xue. Scratchpad based Memory Allocation Techniques for Embedded Software, Australian Research Council (Discovery), 2008 -- 2010, A$285,000.

     

  9. J. Xue and J. Potter. Analysis and Optimisation of Incomplete Object-Oriented Programs, Australian Research Council (Discovery), 2006 -- 2008, A$286,000.

     

  10. J. Xue. Compiler-Directed Code Tiling for Higher Program Performance and Predictability on Multi-Level Memory Hierarchies, Australian Research Council (Discovery), 2004 -- 2006, A$150,000.

     

     

  11. M. Chakravarty, G. Heiser, J. Potter and J. Xue. A Safe and Efficient Multi-Language Component Framework Based on Dynamic Compilation, Australian Research Council (Discovery), 2002 -- 2004, $382,000.

     

  12. J. Jin, Y. Zhong and J.Xue. A Scheme of Local Compilation of Mobile Collectors for Image and Video Search Engines, Australian Research Council (Linkage), 2002 -- 2004, $119,490.

     

  13. J. Xue. Compiler Optimisations for Improving Cache Performance of Uniprocessors, Australian Research Council (Discovery), 2000 -- 2002, A$175,000.

     

  14. J. Xue. Compiling for Distributed Memory Machines in the Polyhedron Model, Australian Research Council (Discovery), 1996 -- 1998, A$111,915.

  • Test-of-Time Award, CGO'21 (for his CGO'10 paper on pointer/alias analysis)
  • Distinguished Paper Award, ASE'19
  • Distinguished Paper Award, ISSTA'19
  • Distinguished Paper Award, ICSE'18
  • Distinguished Paper Award, ECOOP'16
  • Best Paper Award, CGO'16
  • Best Paper Award, CGO'13
  • Best Paper Award, ACSC'05
  • Best Student Paper Award, ACSC'04

Jingling Xue's research spans programming languages, compiler technology, and program analysis. He strives to achieve the practical relevance of his research by focusing on developing innovative solutions and open-source tools for real-world software applications. He is interested in sharing the outcomes of his research projects in the form of open-source tools, by supporting scientific replicability and reproducibility, including SVF (https://svf-tools.github.io/SVF) and Qilin (https://qilinpta.github.io/Qilin).

His current research projects include compiler techniques for improving parallelism and locality for modern computer architectures, compiler techniques for improving the performance of graph processing applications on hardware accelerators (e.g., CPUs, GPUs and FPGAs), pointer/alias analysis techniques and tools for million-line-scale programs, and static and dynamic program analysis techniques and tools for detecting bugs and security vulnerabilities in real-world software applications (e.g., web browsers and Android apps). He has published a research monograph on loop tiling (one of the most important loop transformations for improving parallelism and locality), 70+ journal articles, and 170+ conference papers, with many in prestigious IEEE/ACM journals and conferences in his field. 

He is looking for self-motivated people to join his research group. If you are interested in pursuing a PhD degree under his supervision, please contact him by sending your CV, copies of your publications and your academic transcripts. Some exciting research areas include memory safety in Rust, smart contract analysis and verification, AI compilers, and adversarial attacks and defenses in deep Learning.

He is an IEEE fellow elected for contributions to compiler optimisation and program analysis.