Associate Professor Oliver Diessel
Associate Professor

Associate Professor Oliver Diessel

Engineering
Computer Science and Engineering

Dr Oliver Diessel is an Associate Professor in the School of Computer Science and Engineering.

Research interests

 

I develop methods for the design, test and implementation of digital systems in reconfigurable logic devices called Field-Programmable Gate Arrays.

My interest is in dynamically reconfigurable digital systems in which the circuits are modified while the system is operational.

I aim to promote the use of reconfigurable systems through the development of architectures, design methods and tools that enhance their benefits and reduce their costs.

Interest in engineering

Why did you get into engineering?

A fascination with technology and a natural tendency towards mathematics and science.

What are your research goals?

To develop smart devices that can act independently to benefit people.

What do people not understand about what you do?

They think I can help with practical issues such as fixing their PC or advising them on the best machine to buy. They would be better off asking me some theoretical questions.

Advice for prospective computer engineers & scientists

A career in computer engineering or computer science can see you changing the world. With this great power comes great responsibility. Keep an open mind to the wider implications of what you learn and do. And follow your dream.

Lectures/Courses taught

Configurable Systems

COMP4601 – Design Project B, UNSW (2009 – present)

Computer Architecture

COMP4211 – Advanced Architectures and Algorithms, UNSW (2004 – 2006)

COMP3211 – Computer Architecture, UNSW (2002 – 2006, 2012)

Digital Systems

COMP3222 – Digital Circuits and Systems, UNSW (2008, 2010 – present)

FPGA Implementation of Digital Systems using Verilog, Harbin Institute of Technology (2014 - present)

COMP2021 – Digital Systems Structures, UNSW (2000 – 2004)

FPGA Design Course, Ho Chi Minh City University of Technology (2003)

Computer Programming

COMP1921 – Data Structures and Algorithms, UNSW (2008 – 2009)

XCMP1000 – Computing 1, UNSW Asia (2007)

COMP1021 – Computing 1B, UNSW (2005)

Professional Issues & Ethics

COMP4920 – Professional Issues and Ethics, UNSW (2001)

Students

Number currently in lab: 2

Number graduated: 6

Student Projects:

Current students work on design of fault-tolerant FPGA-based systems for space and fine-grained accelerators for heterogeneous devices.

Previous students have worked on multi-core task migration, the verification of dynamically reconfigurable systems, communications infrastructure for module-based dynamically reconfigurable systems, and configuration encoding techniques for rapid reconfiguration.

Looking for students for projects related to:

Dynamic modular reconfiguration of FPGA-based TMR circuits. This project involves the development of techniques to meet reliability, performance and resource constraints for SRAM FPGA-based implementations of digital systems to recover from radiation-induced Single Event Upsets. We are investigating design approaches, CAD tools for circuit synthesis, partitioning and layout, and benchmarking with circuits typical of applications deployed in space.

Run-time validation of FPGA-based computations. Computational tasks hosted on FPGA devices are increasingly susceptible to run-time errors due to process variation, device degradation and radiation. This project seeks to develop efficient (better than TMR) techniques for checking the correctness of tasks while they are running. Another thrust is to validate dynamically acquired FPGA configurations.

Professional Organisations and Consulting positions

IEEE Member

Editorial Board, ACM Transactions on Reconfigurable Technology and Systems

Education

PhD/postgraduate

PhD, University of Newcastle, Australia, 1998

Undergraduate

B.E. (Computer, Hons), University of Newcastle, Australia, 1991

B.Math., University of Newcastle, Australia, 1991

Phone
+61 2 9385 7384
Location
School of Computer Science & Engineering (K17) Level 5, Room 501B Kensington Campus
  • Journal articles | 2018
    Agiakatsikas D; Cetin E; Diessel O, 2018, 'FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs', IEEE Transactions on Aerospace and Electronic Systems, vol. 54, pp. 2695 - 2712, http://dx.doi.org/10.1109/TAES.2018.2828201
    Journal articles | 2018
    Nguyen NTH; Agiakatsikas D; Zhao Z; Wu T; Cetin E; Diessel O; Gong L, 2018, 'Reconfiguration Control Networks for FPGA-based TMR systems with modular error recovery', Microprocessors and Microsystems, vol. 60, pp. 86 - 95, http://dx.doi.org/10.1016/j.micpro.2018.04.006
    Journal articles | 2018
    Zhao Z; Nguyen NTH; Agiakatsikas D; Lee G; Cetin E; Diessel O, 2018, 'Fine-grained module-based error recovery in FPGA-based TMR systems', ACM Transactions on Reconfigurable Technology and Systems, vol. 11, http://dx.doi.org/10.1145/3173549
    Journal articles | 2017
    Leong PHW; Amano H; Anderson J; Bertels K; Cardoso JMP; Diessel O; Gogniat G; Hutton M; Lee J; Luk W; Lysaght P; Platzner M; Prasanna VK; Rissa T; Silvano C; So HKH; Wang Y, 2017, 'The first 25 years of the FPL conference: Significant papers', ACM Transactions on Reconfigurable Technology and Systems, vol. 10, http://dx.doi.org/10.1145/2996468
    Journal articles | 2017
    Wang C; Li X; Chen Y; Zhang Y; Diessel O; Zhou X, 2017, 'Service-Oriented Architecture on FPGA-Based MPSoC', IEEE Transactions on Parallel and Distributed Systems, vol. 28, pp. 2993 - 3006, http://dx.doi.org/10.1109/TPDS.2017.2701828
    Journal articles | 2010
    Koh S; Diessel OF, 2010, 'Configuration Merging in Point-to-Point Networks for Module-Based FPGA Reconfiguration', ACM Transactions on Reconfigurable Technology and Systems, vol. 3, pp. 1 - 36, http://dx.doi.org/10.1145/1661438.1661442
    Journal articles | 2004
    Scheuermann B; So KK; Guntsch M; Middendorf M; Diessel OF; Elgindy H; Schmeck H, 2004, 'FPGA Implementation of Population-based Ant Colony Optimization', Applied soft computing : the official journal of the World Federation on Soft Computing (WFSC), vol. 4, pp. 303 - 322, http://dx.doi.org/10.1016/j.asoc.2004.03.008
    Journal articles | 2001
    Diessel OF; Milne G, 2001, 'A hardware compiler realizing concurrent processes in reconfigurable logic', IEE Proceedings-Computers and Digital Techniques, vol. 148, pp. 152 - 162, http://dx.doi.org/10.1049/ip-cdt:20010579
    Journal articles | 2000
    Diessel OF; Elgindy H; Middendorf M; Schmeck H; Schmidt B, 2000, 'Dynamic scheduling of tasks on partially reconfigurable FPGAs', IEE Proceedings-Computers and Digital Techniques, vol. 147, pp. 181 - 188, http://dx.doi.org/10.1049/ip-cdt:20000485
  • Conference Papers | 2018
    Kroh A; Diessel O, 2018, 'A Short-Transfer Model for Tightly-Coupled CPU-FPGA Platforms', in Proceedings - 2018 International Conference on Field-Programmable Technology, FPT 2018, pp. 369 - 372, http://dx.doi.org/10.1109/FPT.2018.00075
    Conference Papers | 2017
    Lee G; Agiakatsikas D; Wu T; Cetin E; Diessel O, 2017, 'TLegUp: A TMR code generation tool for SRAM-based FPGA applications using HLS', in Proceedings - IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2017, pp. 129 - 132, http://dx.doi.org/10.1109/FCCM.2017.57
    Conference Papers | 2016
    Agiakatsikas D; Cetin E; Diessel O, 2016, 'FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs', in Field Programmable Logic and Applications (FPL), 2016 26th International Conference on, EPFL, pp. 1 - 4, EPFL, http://dx.doi.org/10.1109/FPL.2016.7577339
    Conference Papers | 2016
    Agiakatsikas D; Nguyen NTH; Zhao Z; Wu T; Cetin E; Diessel O; Gong L, 2016, 'Reconfiguration Control Networks for TMR Systems with Module-based Recovery', in Proceedings - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016, USA, pp. 88 - 91, presented at IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), USA, 01 May 2016 - 03 May 2016, http://dx.doi.org/10.1109/FCCM.2016.30
    Conference Papers | 2016
    Gong L; Wu T; Nguyen NTH; Agiakatsikas D; Zhao Z; Cetin E; Diessel OF, 2016, 'A Programmable Configuration Controller for Fault-Tolerant Applications', in The 2016 International Conference on Field-Programmable Technology (FPT'16), Xi'an, China, pp. 117 - 124, presented at The 2016 International Conference on Field-Programmable Technology (FPT'16), Xi'an, China, 07 December 2016 - 09 December 2016, http://dx.doi.org/10.1109/FPT.2016.7929515
    Conference Papers | 2016
    Nguyen NTH; Agiakatsikas D; Cetin E; Diessel O, 2016, 'Dynamic scheduling of voter checks in FPGA-based TMR systems', in Proceedings of the 2016 International Conference on Field-Programmable Technology, FPT 2016, Xi'an, China, pp. 169 - 172, presented at 2016 International Conference on Field-Programmable Technology (FPT), Xi'an, China, 07 December 2016 - 09 December 2016, http://dx.doi.org/10.1109/FPT.2016.7929525
    Conference Papers | 2015
    Leong PHW; Amano HC; Anderson J; Bertels K; Cardoso JMP; Diessel O; Gogniat G; Hutton M; Lee J; Luk W; others , 2015, 'Significant papers from the first 25 years of the FPL conference', in International Conference on Field Programmable Logic and Applications, IEEE, IEEE, http://dx.doi.org/10.1109/FPL.2015.7293747
    Conference Papers | 2015
    Tran VT; Shivaramaiah NC; Diessel O; Dempster AG, 2015, 'A programmable multi-gnss baseband receiver', in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, pp. 1178 - 1181, IEEE, http://dx.doi.org/10.1109/ISCAS.2015.7168849
    Conference Papers | 2013
    Cetin E; Diessel O; Gong L; Lai V, 2013, 'Towards bounded error recovery time in FPGA-based TMR circuits using dynamic partial reconfiguration', in 2013 23rd International Conference on Field Programmable Logic and Applications (FPL 2013), Porto, Portugal, pp. 1 - 4, presented at 2013 23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, 02 September 2013 - 04 September 2013, http://dx.doi.org/10.1109/FPL.2013.6645571
    Conference Papers | 2012
    Lingkan G; Diessel OF, 2012, 'Functionally Verifying State Saving and Restoration in Dynamically Reconfigurable Systems', in ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA, Association for Computing Machinery, New York, NY, United States, pp. 241 - 244, presented at 2012 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA'12, Monterey, California, USA, 22 February 2012 - 24 February 2012, http://dx.doi.org/10.1145/2145694.2145735
    Conference Presentations | 2012
    Lingkan G; Diessel OF, 2012, 'Simulation-based Functional Verification of Dynamically Reconfigurable Systems', Vol. 13, presented at 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, 30 January 2012 - 02 February 2012, http://dx.doi.org/10.1145/2560042
    Conference Papers | 2011
    Hredzak B; Diessel OF, 2011, 'Optimization of Placement of Dynamic Network-on-chip Cores Using Simulated Annealing', in IEEE, Proceedings of the 37th Annual Conference of the IEEE Industrial Electronics Society, Australia, pp. 2400 - 2405, presented at 37th Annual Conference of the IEEE Industrial Electronics Society, IECON 2011, Melbourne, VIC., Australia, 07 November 2011 - 10 November 2011, http://dx.doi.org/10.1109/IECON.2011.6119685
    Conference Papers | 2011
    Lingkan G; Diessel OF, 2011, 'Modeling Dynamically Reconfigurable Systems for Simulation-based Functional Verification', in IEEE Symposium on Field-Programmable Custom Computing Machines, IEEE Computer Society, New York, NY, United States, pp. 9 - 16, presented at IEEE International Symposium on Field-Programmable Custom Computing Machines, Salt Lake City, Utah, USA, 01 May 2011 - 03 May 2011, http://dx.doi.org/10.1109/FCCM.2011.18
    Conference Papers | 2011
    Lingkan G; Diessel OF, 2011, 'ReSim: A Reusable Library for RTL Simulation of Dynamic Partial Reconfiguration', in International Conference on Field Programmable Technology, IEEE Computer Society, New York, NY, United States, pp. 1 - 8, presented at International Conference on Field-Programmable Technology, New Delhi, India, http://dx.doi.org/10.1109/FPT.2011.6132709
    Conference Papers | 2010
    Kwek B; Sunarso F; Teoh M; van Zaal A; Preston P; Diessel OF, 2010, 'FPGA-based video processing for a vision prosthesis', in Proceedings, 2010 International Conference on Field-Programmable Technology, IEEE, Beijing, China, pp. 345 - 348, presented at 2010 International Conference on Field-Programmable Technology, FPT 10, Beijing, China, 08 December 2010 - 10 December 2010, http://dx.doi.org/10.1109/FPT.2010.5681430
    Conference Papers | 2008
    Kuo JY; Ku AK; Xue J; Diessel OF; Malik U, 2008, 'ACS: an addressless configuration support for efficient partial reconfigurations', in International conference on field-programmable technology, Proceedings, Taipei, Taiwan, pp. 161 - 168, presented at International conference on field-programmable technology, Taipei, Taiwan, 07 December 2008 - 10 December 2008, http://dx.doi.org/10.1109/FPT.2008.4762379
    Conference Papers | 2007
    Koh S; Diessel OF, 2007, 'Module graph merging and placement to reduce reconfiguration overheads in paged FPGA devices', in International Conference on Field Programmable Logic 2007, Amsterdam, Netherlands, pp. 293 - 298, presented at International Conference on Field Programmable Logic 2007, Amsterdam, Netherlands, 27 August 2007 - 29 August 2007, http://dx.doi.org/10.1109/FPL.2007.4380662
    Conference Papers | 2006
    Koh S; Diessel OF, 2006, 'COMMA: A Communications Methodology for Dynamic Module Reconfiguration in FPGAs', in IEEE Symposium on Field-Programmable Custom Computing Machines, IEEE Computer Society, New York, NY, United States, pp. 273 - 274, presented at IEEE Symposium on Field-Programmable Custom Computing Machines 2006, Napa Valley, California, USA, 24 April 2006 - 26 April 2006, http://dx.doi.org/10.1109/FCCM.2006.32
    Conference Papers | 2004
    Malik U; Diessel O, 2004, 'On the placement and granularity of FPGA configurations', in Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on, IEEE, pp. 161 - 168, IEEE

My Research Supervision

Tong Wu, MPhil in Runtime reconfiguration

Junning Fan, MPhil in Fault-tolerance of FPGA-based applications