Dr Oliver Diessel is an Associate Professor in the School of Computer Science and Engineering.
I develop methods for the design, test and implementation of digital systems in reconfigurable logic devices called Field-Programmable Gate Arrays.
My interest is in dynamically reconfigurable digital systems in which the circuits are modified while the system is operational.
I aim to promote the use of reconfigurable systems through the development of architectures, design methods and tools that enhance their benefits and reduce their costs.
A fascination with technology and a natural tendency towards mathematics and science.
To develop smart devices that can act independently to benefit people.
They think I can help with practical issues such as fixing their PC or advising them on the best machine to buy. They would be better off asking me some theoretical questions.
A career in computer engineering or computer science can see you changing the world. With this great power comes great responsibility. Keep an open mind to the wider implications of what you learn and do. And follow your dream.
COMP4601 – Design Project B, UNSW (2009 – present)
COMP4211 – Advanced Architectures and Algorithms, UNSW (2004 – 2006)
COMP3211 – Computer Architecture, UNSW (2002 – 2006, 2012)
COMP3222 – Digital Circuits and Systems, UNSW (2008, 2010 – present)
FPGA Implementation of Digital Systems using Verilog, Harbin Institute of Technology (2014 - present)
COMP2021 – Digital Systems Structures, UNSW (2000 – 2004)
FPGA Design Course, Ho Chi Minh City University of Technology (2003)
COMP1921 – Data Structures and Algorithms, UNSW (2008 – 2009)
XCMP1000 – Computing 1, UNSW Asia (2007)
COMP1021 – Computing 1B, UNSW (2005)
Professional Issues & Ethics
COMP4920 – Professional Issues and Ethics, UNSW (2001)
Current students work on design of fault-tolerant FPGA-based systems for space and fine-grained accelerators for heterogeneous devices.
Previous students have worked on multi-core task migration, the verification of dynamically reconfigurable systems, communications infrastructure for module-based dynamically reconfigurable systems, and configuration encoding techniques for rapid reconfiguration.
Dynamic modular reconfiguration of FPGA-based TMR circuits. This project involves the development of techniques to meet reliability, performance and resource constraints for SRAM FPGA-based implementations of digital systems to recover from radiation-induced Single Event Upsets. We are investigating design approaches, CAD tools for circuit synthesis, partitioning and layout, and benchmarking with circuits typical of applications deployed in space.
Run-time validation of FPGA-based computations. Computational tasks hosted on FPGA devices are increasingly susceptible to run-time errors due to process variation, device degradation and radiation. This project seeks to develop efficient (better than TMR) techniques for checking the correctness of tasks while they are running. Another thrust is to validate dynamically acquired FPGA configurations.
Editorial Board, ACM Transactions on Reconfigurable Technology and Systems
PhD, University of Newcastle, Australia, 1998
B.E. (Computer, Hons), University of Newcastle, Australia, 1991
B.Math., University of Newcastle, Australia, 1991
My Research Supervision
Tong Wu, MPhil in Runtime reconfiguration
Junning Fan, MPhil in Fault-tolerance of FPGA-based applications